550 636 01

 

 

Digital I/O channel (PD 68x)

 

Registers on Digital I/O channel.

RegNo

Identifier

Memory type

Read Out

Type

0

FlagReg

RAM Read Write

Binary

Bit8

1

 

 

 

 

2

 

 

 

 

3

 

 

 

 

4

 

 

 

 

5

 

 

 

 

6

 

 

 

 

7

 

 

 

 

8

 

 

 

 

9

ChConfig

EEPROM RPW

-------

Record

10

 

 

 

 

11

 

 

 

 

12

 

 

 

 

13

 

 

 

 

14

ChType

PROM Read only

-------

Record

15

ChError

RAM Read only

Binary

Record

 

 

RegNo 0: FlagReg

7

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3: Control

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6: InFlag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7: OutFlag

 

 

 

 

 

 

 

 

 

 

Bit 3: Control

If ChConfig.Functions is set to Input mode, the Control flag follows the InFlag.

 

Bit 6: InFlag

The input flag is controlled by the input detector, and shows the logic level on the input terminals. The input flag is true, when the input is ON. If the channel is used as an output, the input flag will follow the output flag. The input signal can be simulated, by setting the channel in input simulation mode (ChConfig.Enablebit[0] = TRUE) and subsequently writing the state to the input flag. The input flag is FALSE after reset in simulation mode.

 

Bit 7: OutFlag

This flag shows the logic level on the digital output. When OutFlag is TRUE, the output is

ON.

A P-NET transmission can control the OutFlag if the ChConfig.Function is set to Output

Mode.

It is recommended that only the flags in this register are used, and not the ones mirrored (for historical compatibility) in the Display Channel RegNo4: FlagReg.

 

 

RegNo 9: ChConfig

The ChConfig variable is a record of the following type:

 

Record

 

 

Enablebit:

Bit8;

(* Offset = 0 *)

 

Functions:

Byte;

(* Offset = 1 *)

 

Notification:

Bit8;

(* Offset = 2 *)

 

User:

Byte;

(* Offset = 3 *)

End

 

 

 

where each field has the following interpretation:

 

Enablebit:

7

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0: InputSimulation

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7:

 

 

 

 

 

 

 

 

 

Default value: 0

 

Functions :     

=

0

=>

Input mode

 

=

2

=>

Output mode

Default value: 0

 

Notification:

7

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2: FallingEdgeOnControl

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3: RisingEdgeOnControl

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4: FallingEdgeOnInFlag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5: RisingEdgeOnInFlag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6: FallingEdgeOnOutFlag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7: RisingEdgeOnOutFlag

 

 

 

 

 

 

 

 

 

Default value: 0

 

RegNo 14: ChType

For the Display channel, ChType is of the following type:

 

Record

 

 

ChannelType:

Word;

(* Offset = 0 *)

 

Exist:

Bit16;

(* Offset = 2 *)

 

Functions:

Bit16;

(* Offset = 4 *)

End

 

 

 

ChType has the following value:

 

ChannelType = 15

 

Exist =

 

15

 

 

 

 

 

 

 

7

 

 

 

 

 

 

0

1

1

0

0

0

0

1

0

0

0

0

0

0

0

0

1

 

 

Functions =

 

15

 

 

 

 

 

 

 

7

 

 

 

 

 

 

0

 

 

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0: InputMode

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1: OutputMode

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RegNo 15: ChError

 

Record

 

 

 

His:Bit8;

(* Offset = 0 *)

 

 

Act:Bit8;

(* Offset = 2 *)

 

End

 

 

 

The 8 bits in ChError.His and ChError.Act have the following meaning. When an error occurs, the corresponding bit is set in both ChError.His and ChError.Act. When the error disappears, the bit is cleared in ChError.Act. The corresponding bit in ChError.His remains set until it is read, whereupon it is cleared automatically. See summary for how ChError.His can be cleared in particular M36 slave modules.

 

7

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7: ModuleError

 

 

 

 

 

 

 

 

 

 

Bit 7:  Module error. If this bit is set, the rest of the bits have no meaning because a module error can cause random error codes on the individual channels (see also "Service channel").