551 215 02

Common channel

Registers in Common channel:

RegNo	Identifier	Memory type	Read Out	Type
0	States	RAM Read Write	Binary	Bit32
1	ActualStates	RAM Read only	Binary	Bit32
2	EnableDutyCycle	RAM Read Write	Binary	Bit32
3	IntensityOffset	RAM Init EEPROM	Decimal	Byte
4
5
6	WDLED	EEPROM	-------	Record
7
8
9
10
11
12
13
14	Guid	PROM Read only	-------	String
15	ChError	RAM Read Write	Binary	Record

RegNo 0: States

States:

Bit32;

When LED_1 to LED_32 bits are set to True, the output to the LED will be ON.

After a power-up or a reset of the module all 32 bits in this register will be set to False.

31	.	.	.	3	2	1	0
								0: LED_1
								1: LED_2
								2: LED_3
								3: LED_4
								31: LED_32

RegNo 1: ActualStates

ActualStates:

Bit32;

This register holds the actual state for LED_1 to LED_32.

In the case where EnableDutyCycle is not enabled, the ActualState for a specific LED will reflect the corresponding bit in RegNo 0, States. If the EnableDutyCycle bit is enabled, the ActualState will follow the PTPreset/OnPreset for that specific LED.

31	.	.	.	3	2	1	0
								0: LED_1
								1: LED_2
								2: LED_3
								3: LED_4
								31: LED_32

RegNo 2: EnableDutyCycle

EnableDutyCycle:

Bit32;

31	.	.	.	3	2	1	0
								0: LED_1
								1: LED_2
								2: LED_3
								3: LED_4
								31: LED_32

If the EnableDutyCycle bit is set to True the Duty-Cycle mode is enabled.

The On time is specified in %, total period in PTPreset. To ensure synchronous flashing LEDs, all 32 bits must be set to False followed by writing to all 32 bits in this register in one operation.

Enabling and disabling duty-cycle mode for LEDs can be performed without affecting the settings in Common.States. This provides the option of changing the mode for LEDs from simple On/Off to duty-cycle mode, and in the event that the duty-cycle mode is disabled again, the LEDs return back to the states defined in Common.States.

RegNo 3: IntensityOffset

IntensityOffset:

Byte;

This variable provides the option to adjust the intensity for all 32 LEDs by adding an offset to the intensity specified in Channel LED_1 to LED_32. The Intensity for LED_1..32 is equal to Common.IntensityOffset + LED_1..32.Intensity. Common.IntensityOffset must be in the range 0-127. Default value: 0.

Common.IntensityOffset  + LED_1..32.Intensity must be in the range 0-127. If the total Intensity exceeds 127, the intensity will automatically be set to 127.        

RegNo 6: WDLED

Record
	WDEnable	Boolean;
	LEDs:	Bit32;
	EnableDutyCycle	Boolean;
	OnPreset:	Byte;
	PTPreset:	Real;
End;

WDEnable:

The watchdog facility may be switched on and off by means of this variable.

By default, watchdog is disabled.

LEDs:

If the WDTimer reaches zero before it is preset again, the following operation is performed:  ‘LEDStates’ in RegNo 1 = (‘LEDStates’ in RegNo 1) OR (WDLED.LEDs).

When the WDTimer becomes > 0, the variable ‘LEDstates’ in RegNo 1 must be updated by P-NET e.g. by a DPI to clear the Watchdog error.

EnableDutyCycle:

A variable duty-cycle output is available when EnableDutyCycle is set True. The On time is specified in %, total period in PTPreset. All LEDs enabled in WDLED.LEDs will be set to Duty-Cycle mode by setting EnableDutyCycle to True.

OnPreset: [%]

This variable holds the On time in % of PTPreset time.

The default value is 50 corresponding to 50 HZ Duty-Cycle.

PTPreset:

This variable holds the period time for the WDLEDs. Default value: 1.0 second.

The default settings for OnPreset and PTPreset will provide a 50% Duty-Cycle output for the WDLEDs with a frequency of 1 Hz.

RegNo 14: Guid

Each channel type in an interface device consists of a unique Guid.

Guid:

String[22];

(*"xxxxxxxxxxxxxxxxxxxxxx"*)

RegNo 15: ChError

Record
	His:	Bit8;
	Act:	Bit8;
End;

There are two sets of error bits, actual and historical. The actual error bits reflect the current situation and will automatically follow any change.

The historical error bits reflect past situations and have the job of holding sporadic errors. The historical error bits are set together with the corresponding actual bits. They remain set after a read, so each individual bit must be cleared by setting it to FALSE. Only the bits where the corresponding actual bit is FALSE can be cleared.

The “His data error” bit in the P-NET response is set if any historical bit is TRUE.

The “Act data error” bit in the P-NET response reflects the validity of the data in the response. Overload, electrical error or an error in other registers involved in calculating the result gives “Act data error”.

7	0
		0: Program_storage_fault
		1: RAM_storage_fault
		2: InternalReset
		3: ExternalReset
		4: Watchdog_Error
		5: EEPROM_error_in_ WDLED
		6: Not used
		7: Not used

The following two bits will cause Act error In the P-NET response on access to all

variables.

Bit 0            Program_storage_fault is set True if the self-test finds an error in the program memory.

Bit 1            RAM_storage_fault is set True if the self-test finds an error in the data memory (RAM).

Bit 2            InternalReset is set True if a reset is caused by a power failure, or if the power has been disconnected (only a His error).

Bit 3            ExternalReset is set True if a reset is caused by writing 255 to Reset, via P‑NET (only a His error).

Bit 4:           Watchdog_Error

The following bit is set True if the self-test finds an error in the data memory (EEPROM) for the variable. EEPROM fault is only set at power-up. If the corresponding variable is accessed, Act error in the P-NET response is set.

This error can occur if the power disappears when writing to EEPROM, so a rewrite to the

variable could possibly solve the problem.

Bit 5:           EEPROM_error_in_WDLED.